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Embedded fault diagnosis in digital systems with BIST.

, , and . Microprocess. Microsystems, 32 (5-6): 279-287 (2008)

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Hierarchical Timing-Critical Paths Analysis in Sequential Circuits., , , , , and . PATMOS, page 1-6. IEEE, (2018)Embedded fault diagnosis in digital systems with BIST., , and . Microprocess. Microsystems, 32 (5-6): 279-287 (2008)Block-Level Fault Model-Free Debug and Diagnosis in Digital Systems., , and . DSD, page 229-232. IEEE Computer Society, (2009)Fault Diagnosis in Integrated Circuits with BIST., , , , and . DSD, page 604-610. IEEE Computer Society, (2007)Diagnozer: A laboratory tool for teaching research in diagnosis of electronic systems., , , , and . MSE, page 12-15. IEEE Computer Society, (2009)Fast identification of true critical paths in sequential circuits., , , , and . Microelectron. Reliab., (2018)A novel random approach to diagnostic test generation., , , and . NORCAS, page 1-4. IEEE, (2016)Hierarchical identification of NBTI-critical gates in nanoscale logic., , , , , , and . LATW, page 1-6. IEEE, (2014)Gate-level modelling of NBTI-induced delays under process variations., , , , , , , and . LATS, page 75-80. IEEE, (2016)Defect-oriented module-level fault diagnosis in digital circuits., , and . DDECS, page 81-86. IEEE Computer Society, (2011)