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Checking signal transition graph implementability by symbolic BDD traversal.

, , , , , and . ED&TC, page 325-332. IEEE Computer Society, (1995)

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Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis., , , , and . DAC, page 63-66. ACM Press, (1996)Synthesis of Speed-Independent Circuits from STG-Unfolding Segment., , , , and . DAC, page 16-21. ACM Press, (1997)Signal Graphs: From Self-Timed to Timed Ones., and . PNPM, page 199-206. IEEE Computer Society, (1985)Evaluation of energy-recovering interconnects for low-power 3D stacked ICs., , , and . 3DIC, page 1-5. IEEE, (2009)Synchronous and asynchronous A-D conversion., , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (2): 217-220 (2000)A low latency asynchronous arbitration circuit., , and . IEEE Trans. Very Large Scale Integr. Syst., 2 (3): 372-377 (1994)Global interconnections in FPGAs: modeling and performance analysis., , , , , and . SLIP, page 51-58. ACM, (2008)Low Latency Synchronization Through Speculation., and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 278-288. Springer, (2004)Hardware and Petri Nets: Application to Asynchronous Circuit Design., , , , and . ICATPN, volume 1825 of Lecture Notes in Computer Science, page 1-15. Springer, (2000)Analyzing Semantics of Concurrent Hardware Specifications., and . ICPP (3), page 211-218. Pennsylvania State University Press, (1989)0-271-00686-2.