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Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS.

, , , , , , , , , and . CICC, page 1-4. IEEE, (2017)

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A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 51 (12): 2917-2927 (2016)Invited Address: Integrated Memory/Logic Architecture for Image Processing., , , and . VLSI Design, page 304-. IEEE Computer Society, (1998)A -89-dBc IMD3 DAC Sub-System in a 465-MHz BW CT Delta-Sigma ADC Using a Power and Area Efficient Calibration Technique., , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (7): 859-863 (2018)15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS., , , , , , , , , and . ISSCC, page 278-279. IEEE, (2016)Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS., , , , , , , , , and . CICC, page 1-4. IEEE, (2017)System design for pixel-parallel image processing., , , and . IEEE Trans. Very Large Scale Integr. Syst., 4 (1): 32-41 (1996)Foreword., and . VLSI Circuits, page 1-2. IEEE, (2016)Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS., , , , , , , , , and . CICC, page 1-4. IEEE, (2018)