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Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networks.

H. Sharma, J. Park, N. Suda, L. Lai, B. Chau, J. Kim, V. Chandra, and H. Esmaeilzadeh. CoRR, (2017)

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Hardik Shah

Hardik Soni

Anuradha Sharma

Tripti Sharma

Krishna Sharma

Other publications of authors with the same name

Domain-Specific Computational Storage for Serverless Computing.R. Mahapatra, S. Ghodrati, B. Ahn, S. Kinzer, S. Wang, H. Xu, L. Karthikeyan, H. Sharma, A. Yazdanbakhsh, M. Alian and 1 other author(s). CoRR, (2023)In-Storage Domain-Specific Acceleration for Serverless Computing.R. Mahapatra, S. Ghodrati, B. Ahn, S. Kinzer, S. Wang, H. Xu, L. Karthikeyan, H. Sharma, A. Yazdanbakhsh, M. Alian and 1 other author(s). ASPLOS (2), page 530-548. ACM, (2024)Neural acceleration for GPU throughput processors.A. Yazdanbakhsh, J. Park, H. Sharma, P. Lotfi-Kamran, and H. Esmaeilzadeh. MICRO, page 482-493. ACM, (2015)TABLA: A unified template-based framework for accelerating statistical machine learning.D. Mahajan, J. Park, E. Amaro, H. Sharma, A. Yazdanbakhsh, J. Kim, and H. Esmaeilzadeh. HPCA, page 14-26. IEEE Computer Society, (2016)From high-level deep neural models to FPGAs.H. Sharma, J. Park, D. Mahajan, E. Amaro, J. Kim, C. Shao, A. Mishra, and H. Esmaeilzadeh. MICRO, page 17:1-17:12. IEEE Computer Society, (2016)Mixed-Signal Charge-Domain Acceleration of Deep Neural networks through Interleaved Bit-Partitioned Arithmetic.S. Ghodrati, H. Sharma, S. Kinzer, A. Yazdanbakhsh, K. Samadi, N. Kim, D. Burger, and H. Esmaeilzadeh. CoRR, (2019)Mixed-Signal Charge-Domain Acceleration of Deep Neural Networks through Interleaved Bit-Partitioned Arithmetic.S. Ghodrati, H. Sharma, S. Kinzer, A. Yazdanbakhsh, J. Park, N. Kim, D. Burger, and H. Esmaeilzadeh. PACT, page 399-411. ACM, (2020)Accelerated Deep Learning for the Edge-to-Cloud continuum: a Specialized Full Stack derived from Algorithms.H. Sharma. Georgia Institute of Technology, Atlanta, GA, USA, (2019)base-search.net (ftgeorgiatech:oai:smartech.gatech.edu:1853/61267).Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networks.H. Sharma, J. Park, N. Suda, L. Lai, B. Chau, J. Kim, V. Chandra, and H. Esmaeilzadeh. CoRR, (2017)The impact of 3D stacking on GPU-accelerated deep neural networks: An experimental study.W. Wahby, T. Sarvey, H. Sharma, H. Esmaeilzadeh, and M. Bakir. 3DIC, page 1-4. IEEE, (2016)

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Disambiguation of "Sharma, Hardik"

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Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networks.

Please choose a person to relate this publication to

Hardik Shah

Hardik Soni

Anuradha Sharma

Tripti Sharma

Krishna Sharma

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Sharma, Hardik"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networks.

Please choose a person to relate this publication to

Hardik Shah

Hardik Soni

Anuradha Sharma

Tripti Sharma

Krishna Sharma

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networks.