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Disambiguation of "Liu, Dean"

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A 10.3GS/s 6b flash ADC for 10G Ethernet applications.

, , , , , , , , and . ISSCC, page 462-463. IEEE, (2013)

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Julien DeAntoni

Graham Deane

Delphine Dean

Ursula Deanini

Dean Spinanger

 

Other publications of authors with the same name

Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS., , , , , , and . IEEE J. Solid State Circuits, 40 (1): 261-275 (2005)Fast frequency acquisition phase-frequency detectors for Gsamples/s phase-locked loops., , and . IEEE J. Solid State Circuits, 37 (10): 1331-1334 (2002)A variable-frequency parallel I/O interface with adaptive power-supply regulation., , , , and . IEEE J. Solid State Circuits, 35 (11): 1600-1610 (2000)A Framework for Designing Reusable Analog Circuits., , and . ICCAD, page 375-381. IEEE Computer Society / ACM, (2003)Macro-modeling concepts for the chip electrical interface., , and . DAC, page 391-394. ACM, (2002)Timing analysis including clock skew., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (11): 1608-1618 (1999)A 112-Gb/s Serial Link Transceiver With Three-Tap FFE and 18-Tap DFE Receiver for up to 43-dB Insertion Loss Channel in 7-nm FinFET Technology., , , , , , , , , and 9 other author(s). IEEE J. Solid State Circuits, 59 (1): 8-18 (January 2024)Analysis of Blocking Dynamic Circuits., and . ICCD, page 122-. IEEE Computer Society, (2002)An integrated VCSEL driver for 10Gb ethernet in 0.13µm CMOS., , , , , , , , , and 4 other author(s). ISSCC, page 930-939. IEEE, (2006)A 112Gb/s Serial Link Transceiver With 3-tap FFE and 18-tap DFE Receiver for up to 43dB Insertion Loss Channel in 7nm FinFET Technology., , , , , , , , , and 9 other author(s). ISSCC, page 108-109. IEEE, (2023)