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Performance-Driven Clustering of Asynchronous Circuits.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (2): 197-209 (2014)

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BASALISC: Flexible Asynchronous Hardware Accelerator for Fully Homomorphic Encryption., , , , , , , , , and 1 other author(s). IACR Cryptol. ePrint Arch., (2022)Island-based Random Dynamic Voltage Scaling vs ML-Enhanced Power Side-Channel Attacks., , , , and . ACM Great Lakes Symposium on VLSI, page 333-338. ACM, (2023)A 72-Port 10G Ethernet Switch/Router Using Quasi-Delay-Insensitive Asynchronous Design., , , , , , and . ASYNC, page 103-104. IEEE Computer Society, (2014)Performance-Driven Clustering of Asynchronous Circuits., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (2): 197-209 (2014)Performance-Driven Clustering of Asynchronous Circuits., , and . PATMOS, volume 6951 of Lecture Notes in Computer Science, page 92-101. Springer, (2011)Proteus: An ASIC Flow for GHz Asynchronous Designs., , and . IEEE Des. Test Comput., 28 (5): 36-51 (2011)BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption., , , , , , , , , and 1 other author(s). IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023 (4): 32-57 (2023)Design of a High-Speed Asynchronous Turbo Decoder., , , and . ASYNC, page 49-59. IEEE Computer Society, (2007)