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Disambiguation of "Canet, Pierre"

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True random number generation exploiting SET voltage variability in resistive RAM memory arrays.

, , , , , , and . NVMTS, page 1-5. IEEE, (2019)

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Carolina Codina Canet

Pierre Venet

Pierre Nyabyenda

Pierre Rudolph

Piérre Schulze

 

Other publications of authors with the same name

True random number generation exploiting SET voltage variability in resistive RAM memory arrays., , , , , , and . NVMTS, page 1-5. IEEE, (2019)Access resistor modelling for EEPROM's retention test vehicle., , and . Microelectron. Reliab., 53 (9-11): 1218-1223 (2013)Extraction of Fowler-Nordheim parameters of thin SiO2 oxide film including polysilicon gate depletion: validation with an EEPROM memory cell., , , , and . ISCAS, page 441-444. IEEE, (2000)Impact of endurance degradation on the programming efficiency and the energy consumption of NOR flash memories., , , , and . Microelectron. Reliab., 54 (9-10): 2262-2265 (2014)Extraction of 3D parasitic capacitances in 90 nm and 22 nm NAND flash memories., , , , , , and . Microelectron. Reliab., 49 (9-11): 1056-1059 (2009)Flash Memory Cell Compact Modeling Using PSP Model., , , , and . BMAS, page 45-49. IEEE, (2008)Modeling of a floating-gate EEPROM cell using a charge sheet approach including variable tunneling capacitance and polysilicon gate depletion effect., , , , and . ISCAS (4), page 822-825. IEEE, (2001)Modeling charge variation during data retention of MLC Flash memories., , , , , and . Microelectron. Reliab., 49 (9-11): 1060-1063 (2009)Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories., , and . Microelectron. Reliab., (2016)An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits., , , , , and . DTIS, page 1-5. IEEE, (2019)