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Prevention of Highly Power-Efficient Circuits due to Short-Channel Effects in MOSFETs., , , , , , , , , and . IEICE Trans. Electron., 102-C (6): 487-494 (2019)Model Development for Robust Design of SOI-MOSFET Circuits used in Radiative Environments., , and . ISDCS, page 1-4. IEEE, (2021)Simulation-Based Power-Loss Optimization of General-Purpose High-Voltage SiC MOSFET Circuit Under High-Frequency Operation., , , , , , , and . IEEE Access, (2021)History Effect on Circuit Performance of SOI-MOSFETs., , , , , and . ISDCS, page 1-5. IEEE, (2020)Modeling of Short-Channel Effect on Multi-Gate MOSFETs for Circuit Simulation., , , , , and . ISDCS, page 1-4. IEEE, (2020)Modeling of SJ-MOSFET for High-Voltage Applications with Inclusion of Carrier Dynamics during Switching., , , , , , and . ISDCS, page 1-4. IEEE, (2021)ACTAS: an accurate timing analysis system for VLSI., , , , and . DAC, page 152-158. ACM, (1985)Modeling of dynamic trap density increase for aging simulation of any MOSFET circuits., , , , , , , , , and 1 other author(s). ESSDERC, page 192-195. IEEE, (2017)Compact modeling of dynamic trap density evolution for predicting circuit-performance aging., , , , , , and . Microelectron. Reliab., (2018)Modeling of Trench-Gate Type HV-MOSFETs for Circuit Simulation., , , , , , and . IEICE Trans. Electron., 96-C (5): 744-751 (2013)