Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

System design principles combining sub-threshold circuit and architectures with energy scavenging mechanisms.

B. Calhoun, S. Khanna, Y. Zhang, J. Ryan, and B. Otis. ISCAS, page 269-272. IEEE, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Brian Calhoun

H -H Kaatz

Florian H H Giesert

Lobna H airall h

Albrecht H -H Meyer

Other publications of authors with the same name

26.8 A 236nW -56.5dBm-sensitivity bluetooth low-energy wakeup receiver with energy harvesting in 65nm CMOS.N. Roberts, K. Craig, A. Shrivastava, S. Wooters, Y. Shakhsheer, B. Calhoun, and D. Wentzloff. ISSCC, page 450-451. IEEE, (2016)New category of ultra-thin notchless 6T SRAM cell layout topologies for sub-22nm.R. Mann, and B. Calhoun. ISQED, page 425-430. IEEE, (2011)Sub-threshold Circuit Design with Shrinking CMOS Devices.B. Calhoun, S. Khanna, R. Mann, and J. Wang. ISCAS, page 2541-2544. IEEE, (2009)Serial sub-threshold circuits for ultra-low-power systems.S. Khanna, and B. Calhoun. ISLPED, page 27-32. ACM, (2009)Virtual prototyper (ViPro): an early design space exploration and optimization tool for SRAM designers.S. Nalam, M. Bhargava, K. Mai, and B. Calhoun. DAC, page 138-143. ACM, (2010)A reverse write assist circuit for SRAM dynamic write VMIN tracking using canary SRAMs.A. Banerjee, M. Sinangil, J. Poulton, C. Gray, and B. Calhoun. ISQED, page 1-8. IEEE, (2014)A 745pA Hybrid Asynchronous Binary-Searching and Synchronous Linear-Searching Digital LDO with 3.8×105 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage Ripple.S. Li, and B. Calhoun. ISSCC, page 232-234. IEEE, (2019)A 10mV-input boost converter with inductor peak current control and zero detection for thermoelectric energy harvesting.A. Shrivastava, D. Wentzloff, and B. Calhoun. CICC, page 1-4. IEEE, (2014)Error-energy analysis of hardware logarithmic approximation methods for low power applications.A. Klinefelter, J. Ryan, J. Tschanz, and B. Calhoun. ISCAS, page 2361-2364. IEEE, (2015)A 2.5 ppm/°C 1.05-MHz Relaxation Oscillator With Dynamic Frequency-Error Compensation and Fast Start-Up Time.N. Liu, R. Agarwala, A. Dissanayake, D. Truesdell, S. Kamineni, and B. Calhoun. IEEE J. Solid State Circuits, 54 (7): 1952-1959 (2019)

BibSonomy

Disambiguation of "Calhoun, Benton H."

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

System design principles combining sub-threshold circuit and architectures with energy scavenging mechanisms.

Please choose a person to relate this publication to

Brian Calhoun

H -H Kaatz

Florian H H Giesert

Lobna H airall h

Albrecht H -H Meyer

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Calhoun, Benton H."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML System design principles combining sub-threshold circuit and architectures with energy scavenging mechanisms.

Please choose a person to relate this publication to

Brian Calhoun

H -H Kaatz

Florian H H Giesert

Lobna H airall h

Albrecht H -H Meyer

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

System design principles combining sub-threshold circuit and architectures with energy scavenging mechanisms.