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A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing.

, , , , , и . SAMOS, том 11733 из Lecture Notes in Computer Science, стр. 429-441. Springer, (2019)

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Deepak Bararia

Deepak Ajwani

Deepak Jain

Deepak Samuel

Deepak Mathaikutty

 

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A Platform to Analyze DDR3 DRAM's Power and Retention Time., , , , и . IEEE Des. Test, 34 (4): 52-59 (2017)Advanced heterogeneous memory subsystems for energy-constrained computing = Fortgeschrittene heterogene Speichersubsysteme für Computersysteme mit limitiertem Energieverbrauch.. Kaiserslautern University of Technology, Germany, (2021)Improving the error behavior of DRAM by exploiting its Z-channel property., , , , , и . DATE, стр. 1492-1495. IEEE, (2018)A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing., , , , , и . SAMOS, том 11733 из Lecture Notes in Computer Science, стр. 429-441. Springer, (2019)RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM., , , , , , , и . SAMOS, том 11733 из Lecture Notes in Computer Science, стр. 34-47. Springer, (2019)Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling., , , , , и . IEEE Access, (2021)An analysis on retention error behavior and power consumption of recent DDR4 DRAMs., , , , , , и . DATE, стр. 293-296. IEEE, (2018)An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices., , , , , , и . MEMSYS, стр. 114-125. ACM, (2020)Efficient coding scheme for DDR4 memory subsystems., , , , , , и . MEMSYS, стр. 148-157. ACM, (2018)