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Disambiguation of "Bankman, Daniel"

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Mixed-signal circuits for embedded machine-learning applications.

, , , , and . ACSSC, page 1341-1345. IEEE, (2015)

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Daniel

Daniel

Daniel Stanze

Systematische Analyse von Rezeptoren und Effektormechanismen der pulmonalen angeborenen Immunität. Uni Marburg, (2009)

Daniel Wied

Zivilprozessuale Qualifikationsprobleme im Spannungsfeld von Vertrag und Delikt: ein Beitrag zur Auslegung nationalen Zivilprozessrechts in europäischer Perspektive. Uni Regensburg, (2009)

Daniel Dirkmann

In-vitro-Untersuchungen zum Effekt von Hypothermie und Azidose auf Variablen thrombelastometrischer Messungen der Blutgerinnung. Uni Duisburg-Essen, (2009)
 

Other publications of authors with the same name

Bit Error Tolerance of a CIFAR-10 Binarized Convolutional Neural Network Processor., , , , and . ISCAS, page 1-5. IEEE, (2018)An 8-bit, 16 input, 3.2 pJ/op switched-capacitor dot product circuit in 28-nm FDSOI CMOS., and . A-SSCC, page 21-24. IEEE, (2016)BinarEye: An always-on energy-accuracy-scalable binary CNN processor with all memory on chip in 28nm CMOS., , , , and . CICC, page 1-4. IEEE, (2018)Mixed-signal circuits for embedded machine-learning applications., , , , and . ACSSC, page 1341-1345. IEEE, (2015)An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS., , , , and . IEEE J. Solid State Circuits, 54 (1): 158-172 (2019)RRAM-Based In-Memory Computing for Embedded Deep Neural Networks., , , and . ACSSC, page 1511-1515. IEEE, (2019)An always-on 3.8μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS., , , , and . ISSCC, page 222-224. IEEE, (2018)TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs., , , , , , , , , and 2 other author(s). DAC, page 74:1-74:10. ACM, (2018)