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Disambiguation of "Dehaene, Wim"

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Clock Recovery Circuit Using a Transmission Line as a Delay Element from a 100Gb/s bit stream.

, , and . NEWCAS, page 261-264. IEEE, (2022)

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Wim Wätjen

Wim Broekaert

Wim Lutzke

Wim Beyers

Wim Damen

 

Other publications of authors with the same name

Design and Synthesis of Pareto Buffers Offering Large Range Runtime Energy/Delay Tradeoffs Via Combined Buffer Size and Supply Voltage Tuning., , , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (1): 117-127 (2009)Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture., , and . IEEE Trans. Circuits Syst. II Express Briefs, 62-II (1): 31-35 (2015)Transient Behavior and Phase Noise Performance of Pulsed-Harmonic Oscillators., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (7): 2119-2128 (2014)Dense, 11 V-Tolerant, Balanced Stimulator IC with Digital Time-Domain Calibration for $100 nA Error., and . IEEE Trans. Biomed. Circuits Syst., 17 (5): 1166-1176 (October 2023)An End-to-End Dual ASIC OFDM Transceiver for Ultrasound In-Body Communication., , and . IEEE Trans. Biomed. Circuits Syst., 17 (4): 664-673 (August 2023)Design Margin Reduction Through Completion Detection in a 28-nm Near-Threshold DSP Processor., and . IEEE J. Solid State Circuits, 57 (2): 651-660 (2022)A high-voltage output driver in a 2.5-V 0.25-μm CMOS technology., , , and . IEEE J. Solid State Circuits, 40 (3): 576-583 (2005)A Thin-Film, a-IGZO, 128b SRAM and LPROM Matrix With Integrated Periphery on Flexible Foil., , , , , , , and . IEEE J. Solid State Circuits, 52 (11): 3095-3103 (2017)Fully Integrated CMOS EME-Suppressing Current Regulator for Automotive Electronics., and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (2): 266-275 (2012)A low leakage 500MHz 2T embedded dynamic memory with integrated semi-transparent refresh., , and . ESSCIRC, page 523-526. IEEE, (2011)