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System-level parallelism and concurrency maximisation in reconfigurable computing applications.

, , , , , and . Int. J. Embed. Syst., 2 (1/2): 62-72 (2006)

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Multi-Resolution Image Registration Using Genetics., and . ICIP (2), page 452-456. IEEE, (1999)Software for Brain Network Simulations: A Comparative Study., , , and . Frontiers Neuroinformatics, (2017)Analog Computing with Metatronic Circuits., , , , , , , and . CoRR, (2020)System-level parallelism and concurrency maximisation in reconfigurable computing applications., , , , , and . Int. J. Embed. Syst., 2 (1/2): 62-72 (2006)Bringing High-Performance Reconfigurable Computing to Exact Computations., , and . FPL, page 79-85. IEEE, (2007)A Segmentation Model for Partial Run-Time Reconfiguration., and . FPL, page 1-4. IEEE, (2006)Enabling PGAS Productivity with Hardware Support for Shared Address Mapping: A UPC Case Study., , , and . HPCC/CSS/ICESS, page 1-10. IEEE, (2014)A Portable Memory Access Framework on Reconfigurable Computers., , and . FPT, page 333-336. IEEE, (2007)Wavelet spectral dimension reduction of hyperspectral imagery on a reconfigurable computer., , , and . FPT, page 399-402. IEEE, (2004)Extreme Heterogeneity in Deep Learning Architectures., , , and . Smart Data, Chapman and Hall/CRC, (2019)