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TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design.

L. Guo, Y. Chi, J. Lau, L. Song, X. Tian, M. Khatti, W. Qiao, J. Wang, E. Ustun, Z. Fang, Z. Zhang, and J. Cong. CoRR, (2022)

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Fang-Fang Tang

Xing Fang

Fang Chen

Weigui Fang

Xiangfan Fang

Other publications of authors with the same name

LEAP: A Deep Learning based Aging-Aware Architecture Exploration Framework for FPGAs.B. Ghavami, S. Ebrahimi, Z. Fang, and L. Shannon. FPGA, page 146. ACM, (2021)HeatViT: Hardware-Efficient Adaptive Token Pruning for Vision Transformers.P. Dong, M. Sun, A. Lu, Y. Xie, K. Liu, Z. Kong, X. Meng, Z. Li, X. Lin, Z. Fang and 1 other author(s). HPCA, page 442-455. IEEE, (2023)Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks.C. Zhang, Z. Fang, P. Zhou, P. Pan, and J. Cong. ICCAD, page 12:1-12:8. ACM, (2016)Supporting Address Translation for Accelerator-Centric Architectures.Y. Hao, Z. Fang, G. Reinman, and J. Cong. HPCA, page 37-48. IEEE Computer Society, (2017)Fast and High-Performance Learned Image Compression With Improved Checkerboard Context Model, Deformable Residual Module, and Knowledge Distillation.H. Fu, F. Liang, J. Liang, Y. Wang, Z. Fang, G. Zhang, and J. Han. IEEE Trans. Image Process., (2024)Measuring Microarchitectural Details of Multi- and Many-Core Memory Systems through Microbenchmarking.Z. Fang, S. Mehta, P. Yew, A. Zhai, J. Greensky, G. Beeraka, and B. Zang. ACM Trans. Archit. Code Optim., 11 (4): 55:1-55:26 (2014)FILM-QNN: Efficient FPGA Acceleration of Deep Neural Networks with Intra-Layer, Mixed-Precision Quantization.M. Sun, Z. Li, A. Lu, Y. Li, S. Chang, X. Ma, X. Lin, and Z. Fang. FPGA, page 134-145. ACM, (2022)SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.S. Panchapakesan, Z. Fang, and J. Li. FPL, page 286-293. IEEE, (2021)HyBNN: Quantifying and Optimizing Hardware Efficiency of Binary Neural Networks.G. Yang, J. Lei, Z. Fang, Y. Li, J. Zhang, and W. Xie. FCCM, page 203. IEEE, (2023)Journal Track Paper ICFPT 2023 : HyBNN: Quantifying and Optimizing Hardware Efficiency of Binary Neural Networks.G. Yang, J. Lei, Z. Fang, Y. Li, J. Zhang, and W. Xie. ICFPT, page 3-4. IEEE, (2023)

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Disambiguation of "Fang, Zhenman"

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TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design.

Please choose a person to relate this publication to

Fang-Fang Tang

Xing Fang

Fang Chen

Weigui Fang

Xiangfan Fang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Fang, Zhenman"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design.

Please choose a person to relate this publication to

Fang-Fang Tang

Xing Fang

Fang Chen

Weigui Fang

Xiangfan Fang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
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TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design.