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Analog Deep Neural Network Based on NOR Flash Computing Array for High Speed/Energy Efficiency Computation.

Y. Xiang, P. Huang, Z. Zhou, R. Han, Y. Jiang, Q. Shu, Z. Su, Y. Liu, X. Liu, and J. Kang. ISCAS, page 1-4. IEEE, (2019)

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Jinfeng Du

Jinfeng Feng

Mihyun Kang

Ewha Kang

Mujin Kang

Other publications of authors with the same name

Design and Hardware Implementation of Neuromorphic Systems With RRAM Synapses and Threshold-Controlled Neurons for Pattern Recognition.Y. Jiang, P. Huang, D. Zhu, Z. Zhou, R. Han, L. Liu, X. Liu, and J. Kang. IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (9): 2726-2738 (2018)An ultra-high-density and energy-efficient content addressable memory design based on 3D-NAND flash.H. Yang, P. Huang, R. Han, X. Liu, and J. Kang. Sci. China Inf. Sci., (April 2023)The synthesis method of logic circuits based on the iMemComp gates.X. Cui, Q. Lin, X. Cui, F. Wei, X. Liu, and J. Kang. Integr., (2020)STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization.F. Wang, G. Luo, G. Sun, J. Zhang, J. Kang, Y. Wang, D. Niu, and H. Zheng. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (5): 864-877 (2021)A Novel Convolution Computing Paradigm Based on NOR Flash Array with High Computing Speed and Energy Efficient.R. Han, P. Huang, Y. Xiang, C. Liu, Z. Dong, Z. Su, Y. Liu, L. Liu, X. Liu, and J. Kang. ISCAS, page 1-4. IEEE, (2018)FNSim: A Device-Circuit-Algorithm Codesigned Simulator for Flash based Neural Network.M. Zhang, P. Huang, Y. Zhang, Y. Xiang, R. Han, L. Liu, X. Liu, and J. Kang. ASICON, page 1-4. IEEE, (2019)Circuit design of RRAM-based neuromorphic hardware systems for classification and modified Hebbian learning.Y. Jiang, P. Huang, Z. Zhou, and J. Kang. Sci. China Inf. Sci., 62 (6): 62408:1-62408:19 (2019)A novel voltage-type sense amplifier for low-power nonvolatile memories.M. Li, J. Kang, and Y. Wang. Sci. China Inf. Sci., 53 (8): 1676-1681 (2010)Device and Circuit Interaction Analysis of Stochastic Behaviors in Cross-Point RRAM Arrays.H. Li, P. Huang, B. Gao, X. Liu, J. Kang, and H. Wong. CoRR, (2016)A physics-based electromigration reliability model for interconnects lifetime prediction.L. Cai, W. Chen, J. Kang, G. Du, X. Liu, and X. Zhang. Sci. China Inf. Sci., (2021)

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Disambiguation of "Kang, Jinfeng"

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Analog Deep Neural Network Based on NOR Flash Computing Array for High Speed/Energy Efficiency Computation.

Please choose a person to relate this publication to

Jinfeng Du

Jinfeng Feng

Mihyun Kang

Ewha Kang

Mujin Kang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Kang, Jinfeng"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Analog Deep Neural Network Based on NOR Flash Computing Array for High Speed/Energy Efficiency Computation.

Please choose a person to relate this publication to

Jinfeng Du

Jinfeng Feng

Mihyun Kang

Ewha Kang

Mujin Kang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Analog Deep Neural Network Based on NOR Flash Computing Array for High Speed/Energy Efficiency Computation.