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Preliminary study between frequency-domain equalizer and 0-ASCET for PLC., , and . ICUWB, page 1-5. IEEE, (2017)Recursive algorithm to directly obtain the sum of correlations in a CSS., , , , , , and . Signal Process., 91 (5): 1343-1346 (2011)HW/SW Architecture for a Broadband Power-Line Communication System With LS Channel Estimator and ASCET Equalizer., , and . IEEE Trans. Ind. Informatics, 16 (11): 6740-6749 (2020)FPGA-Based Architecture for Medium Access Techniques in Broadband PLC., , , and . IEEE Access, (2018)Lossless implementation in VHDL of an image wavelet transform., , , , and . ETFA (2), page 195-198. IEEE, (2003)0-7803-7937-3.Real-time implementation of an efficient Golay correlator (EGC) applied to ultrasonic sensorial systems., , , , , , , and . Microprocess. Microsystems, 27 (8): 397-406 (2003)A DSP- and FPGA-Based Industrial Control With High-Speed Communication Interfaces for Grid Converters Applied to Distributed Power Generation Systems., , , , , and . IEEE Trans. Ind. Electron., 56 (3): 654-669 (2009)Remote Laboratory for Experimentation With Multilevel Power Converters., , , , , and . IEEE Trans. Ind. Electron., 56 (7): 2450-2463 (2009)Advanced monitoring of rail breakage in double-track railway lines by means of PCA techniques., , , , , , , , and . Appl. Soft Comput., (2018)Modular Architecture for Efficient Generation and Correlation of Complementary Set of Sequences., , , , , , and . IEEE Trans. Signal Process., 55 (5-2): 2323-2337 (2007)