( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Pattern Pruner: Automatic Pattern Size Reduction Method that Uses Computational Intelligence-Based Testing.

, , , и . ITC, стр. 1-10. IEEE Computer Society, (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Doris Schmitt-Landsiedel

Doris Schmitt-Landsiedel

Doris Schmitt-Landsiedel

Doris Schmitt

Doris Schmitt

 

Другие публикации лиц с тем же именем

Modelling and simulation of nanomagnetic logic with cadence virtuoso using Verilog-A., , , , , и . ESSDERC, стр. 97-100. IEEE, (2015)A 13.56MHz class e power amplifier for inductively coupled DC supply with 95% power added efficiency (PAE)., , , , и . EURFID, стр. 87-93. IEEE, (2015)In-Situ Delay Characterization and Local Supply Voltage Adjustment for Compensation of Local Parametric Variations., , , , и . IEEE J. Solid State Circuits, 42 (7): 1583-1592 (2007)Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption., , , и . PATMOS, том 3254 из Lecture Notes in Computer Science, стр. 392-401. Springer, (2004)Analysis and compensation of the bitline multiplexer in SRAM current sense amplifiers., , и . IEEE J. Solid State Circuits, 36 (11): 1745-1755 (2001)A 1.8-V MOSFET-only ΣΔ modulator using substrate biased depletion-mode MOS capacitors in series compensation., , и . IEEE J. Solid State Circuits, 36 (7): 1041-1047 (2001)A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions., , , , , , , , , и 9 other автор(ы). IEEE J. Solid State Circuits, 42 (1): 134-144 (2007)A Design Space Comparison of 6T and 8T SRAM Core-Cells., , и . PATMOS, том 5349 из Lecture Notes in Computer Science, стр. 116-125. Springer, (2008)A 0.6V 100dB 5.2MHz transconductance amplifier realized in a multi-VT process., , , и . ESSCIRC, стр. 247-250. IEEE, (2005)Dynamic state-retention flip flop for fine-grained sleep-transistor scheme., , , , , , , , , и 2 other автор(ы). ESSCIRC, стр. 145-148. IEEE, (2005)