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Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices.

E. Reggiani, A. Pappalardo, M. Doblas, M. Moretó, M. Olivieri, O. Unsal, and A. Cristal. HPCA, page 1085-1098. IEEE, (2023)

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Enrico Fest

Enrico Körner

Enrico Meier

Enrico Schramm

Enrico Streit

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Adaptable Register File Organization for Vector Processors.C. Lazo, E. Reggiani, C. Morales, R. Bagué, L. Vargas, M. Salinas, M. Cortés, O. Unsal, and A. Cristal. CoRR, (2021)Performance Portable FPGA Design.N. Voss, T. Becker, S. Tilbury, G. Gaydadjiev, O. Mencer, A. Nestorov, E. Reggiani, and W. Luk. FPGA, page 324. ACM, (2020)DVINO: A RISC-V Vector Processor Implemented in 65nm Technology.G. Cabo, G. Candón, X. Carril, M. Doblas, M. Domínguez, A. González, C. Hernández, V. Jiménez, V. Kostalampros, R. Langarita and 33 other author(s). DCIS, page 1-6. IEEE, (2022)Adaptable Register File Organization for Vector Processors.C. Lazo, E. Reggiani, C. Morales, R. Bagué, L. Vargas, M. Salinas, M. Cortés, O. Unsal, and A. Cristal. HPCA, page 786-799. IEEE, (2022)Pearson Correlation Coefficient Acceleration for Modeling and Mapping of Neural Interconnections.E. Reggiani, E. D'Arnese, A. Purgato, and M. Santambrogio. IPDPS Workshops, page 223-228. IEEE Computer Society, (2017)Enhancing the Scalability of Multi-FPGA Stencil Computations via Highly Optimized HDL Components.E. Reggiani, E. Sozzo, D. Conficconi, G. Natale, C. Moroni, and M. Santambrogio. ACM Trans. Reconfigurable Technol. Syst., 14 (3): 15:1-15:33 (2021)A Case Study for an Accelerated DCNN on FPGA-Based Embedded Distributed System.A. Nestorov, A. Scolari, E. Reggiani, L. Stornaiuolo, and M. Santambrogio. IPDPS Workshops, page 91-94. IEEE, (2019)Flex-SFU: Accelerating DNN Activation Functions by Non-Uniform Piecewise Approximation.E. Reggiani, R. Andri, and L. Cavigelli. DAC, page 1-6. IEEE, (2023)On How to Improve FPGA-Based Systems Design Productivity via SDAccel.G. Guidi, E. Reggiani, L. Tucci, G. Durelli, M. Blott, and M. Santambrogio. IPDPS Workshops, page 247-252. IEEE Computer Society, (2016)Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices.E. Reggiani, A. Pappalardo, M. Doblas, M. Moretó, M. Olivieri, O. Unsal, and A. Cristal. HPCA, page 1085-1098. IEEE, (2023)

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Disambiguation of "Reggiani, Enrico"

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Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices.

Please choose a person to relate this publication to

Enrico Fest

Enrico Körner

Enrico Meier

Enrico Schramm

Enrico Streit

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Reggiani, Enrico"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices.

Please choose a person to relate this publication to

Enrico Fest

Enrico Körner

Enrico Meier

Enrico Schramm

Enrico Streit

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices.