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Disambiguation of "Ono, Nobuto"

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Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture.

, , , , , and . ISQED, page 153-158. IEEE Computer Society, (2005)

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Kaoru Onodera

Keita Ono

Yoshiko Ono

Masamichi Ono

Asayo Ono

 

Other publications of authors with the same name

Operation and Stability Analysis of Temperature-Insensitive MOS Reference Current Source with Self-Bias Circuit., , , , , , , , , and 3 other author(s). ISOCC, page 137-138. IEEE, (2020)Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture., , , , , and . ISQED, page 153-158. IEEE Computer Society, (2005)Long Battery Life IoT Sensing by Beat Sensors., , , , and . ICPS, page 430-435. IEEE, (2019)Proposal of Metrics for SSTA Accuracy Evaluation., , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (4): 808-814 (2007)DEPOGIT: dense power-ground interconnect architecture for physical design integrity., , , and . ASP-DAC, page 517-522. IEEE Computer Society, (2004)On-Chip Thermal Gradient Analysis Considering Interdependence between Leakage Power and Temperature., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (12): 3491-3499 (2006)Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations., , , , , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 92-A (4): 990-997 (2009)Unit cell mismatch scrambling method for high-resolution unary DAC based on virtual 3D layout., , , , , , , , , and 6 other author(s). IEICE Electron. Express, 19 (24): 20220430 (2022)Adaptive Porting of Analog IPs with Reusable Conservative Properties., , , , , and . ISVLSI, page 18-23. IEEE Computer Society, (2006)On-Chip Thermal Gradient Analysis and Temperature Flattening for SoC Design., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (12): 3382-3389 (2005)