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Response modeling runtime schedulers for timing analysis of self-timed dataflow graphs.

, , , and . J. Syst. Archit., (2016)

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Special Issue On Asynchronous Circuits And Systems., , and . Proc. IEEE, 87 (2): 219-222 (1999)Synchronous Full-Scan for Asynchronous Handshake Circuits., , , and . J. Electron. Test., 19 (4): 397-406 (2003)VLSI Programming of a Modulo-N Counter with Constant Response Time and Constant Power.. Asynchronous Design Methodologies, volume A-28 of IFIP Transactions, page 1-11. North-Holland, (1993)Silicon 3D-integration technology and systems., , , , , , , , , and . ISSCC, page 510-511. IEEE, (2010)Modeling & analysis of an LTE-Advanced receiver using mode-controlled dataflow., , and . Microprocess. Microsystems, (2016)VLSI programming and silicon compilation; a novel approach from Philips research., , , and . ICCD, page 150-151. IEEE, (1988)ESPRIT 6143: exploitation of asynchronous circuit technologies.. ICECS, page 764-767. IEEE, (1996)Reading of cracked optical discs using Iterative Learning Control., , , , and . ACC, page 258-263. IEEE, (2009)FP-scheduling for mode-controlled dataflow: a case study., , and . DATE, page 1257-1260. ACM, (2015)Stretching quasi delay insensitivity by means of extended isochronic forks., , and . ASYNC, page 99-. IEEE Computer Society, (1995)