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VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2 m )Using Dual Bases., , , and . VDAT, volume 7373 of Lecture Notes in Computer Science, page 258-269. Springer, (2012)On the design of different concurrent EDC schemes for S-Box and GF(p)., , , , and . ISQED, page 211-218. IEEE, (2010)Secure Testable S-box Architecture for Cryptographic Hardware Implementation., , and . Comput. J., 53 (5): 581-591 (2010)Dual Extended Noise Shaping for High Performance Cross-Coupled Sigma-Delta Modulators., , and . NGMAST, page 209-214. IEEE, (2014)Fusion of evolvable genome structure and multi-objective optimization for subspace clustering., , and . Pattern Recognit., (2019)A Multi-Mode Sigma-Delta ADC for GSM/WCDMA/WLAN Applications., , and . J. Signal Process. Syst., 62 (2): 117-130 (2011)A Routing-Aware ILS Design Technique., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (12): 2335-2338 (2011)High-Performance CNN Accelerator on FPGA Using Unified Winograd-GEMM Architecture., , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (12): 2816-2828 (2019)A Multi-kernel Semi-supervised Metric Learning Using Multi-objective Optimization Approach., , and . ICONIP (2), volume 11302 of Lecture Notes in Computer Science, page 530-541. Springer, (2018)Semi-supervised Transfer Metric Learning with Relative Constraints., , , and . ICONIP (3), volume 11303 of Lecture Notes in Computer Science, page 230-241. Springer, (2018)