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Disambiguation of "Núñez-Yáñez, José L."

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On the Hardware Reduction of z-Datapath of Vectoring CORDIC.

, , , , and . ISCAS, page 3002-3005. IEEE, (2007)

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José Reynoso Núñez

Allan José Lacayo Núñez

José Reyes L

Ismael Núñez-Riboni

Marco Núñez-Müller

 

Other publications of authors with the same name

On the Hardware Reduction of z-Datapath of Vectoring CORDIC., , , , and . ISCAS, page 3002-3005. IEEE, (2007)Run-time power and performance scaling with CPU-FPGA hybrids., and . AHS, page 55-60. IEEE, (2014)Energy proportional streaming spiking neural network in a reconfigurable system., and . Microprocess. Microsystems, (2017)Reconfigurable Network Stream Processing on Virtualized FPGA Resources., , , and . Int. J. Reconfigurable Comput., (2018)High-Performance Ultrasonic Levitation with FPGA-based Phased Arrays., , , , , and . CoRR, (2019)Energy efficient Reconfigurable Computing with Adaptive Voltage and Logic scaling.. SIGARCH Comput. Archit. News, 42 (4): 87-92 (2014)Energy Proportional Heterogenous Computing with Reconfigurable MPSoC.. HPCS, page 642. IEEE, (2019)Fused Architecture for Dense and Sparse Matrix Processing in TensorFlow Lite.. IEEE Micro, 42 (6): 55-66 (2022)Evolutionary FPGA-Based Spiking Neural Networks for Continual Learning., , , and . ARC, volume 14251 of Lecture Notes in Computer Science, page 260-274. Springer, (2023)A Low-complexity FPGA TDC based on a DSP Delay Line and a Wave Union Launcher., , and . DSD, page 101-108. IEEE, (2022)