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Modeling and Designing Heterogeneous Systems.

, , , , , and . Concurrency and Hardware Design, volume 2549 of Lecture Notes in Computer Science, page 228-273. Springer, (2002)

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Quasi-static Scheduling for Concurrent Architectures., , , , and . Fundam. Informaticae, 62 (2): 171-196 (2004)Modeling and Designing Heterogeneous Systems., , , , , and . Concurrency and Hardware Design, volume 2549 of Lecture Notes in Computer Science, page 228-273. Springer, (2002)Incremental high-level synthesis., , , , , , and . ASP-DAC, page 701-706. IEEE, (2010)Quasi-Static Scheduling for Concurrent Architectures., , , and . ACSD, page 29-40. IEEE Computer Society, (2003)Realistic performance-constrained pipelining in high-level synthesis., , , and . DATE, page 1382-1387. IEEE, (2011)Exploiting area/delay tradeoffs in high-level synthesis., , , and . DATE, page 1024-1029. IEEE, (2012)Generation of minimal size code for scheduling graphs., , and . DATE, page 668-673. IEEE Computer Society, (2001)Heuristic Minimization of Synchronous Relations., , and . ICCD, page 428-433. IEEE Computer Society, (1993)The maximum set of permissible behaviors for FSM networks., and . ICCAD, page 316-320. IEEE Computer Society / ACM, (1993)Simulation based deadlock analysis for system level designs., , , , and . DAC, page 260-265. ACM, (2005)