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Disambiguation of "Jun, Young-Hyun"

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A DLL With Jitter Reduction Techniques and Quadrature Phase Generation for DRAM Interfaces.

, , , , and . IEEE J. Solid State Circuits, 44 (5): 1522-1530 (2009)

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Young-Hyun Lee

Young-Hyun Lee

Young-Hyun Lee

Young-Hyun Sung

Young Jun Kim

 

Other publications of authors with the same name

A DLL with Jitter-Reduction Techniques for DRAM Interfaces., , , , and . ISSCC, page 496-497. IEEE, (2007)Adaptive frequency-controlled ultra-fast hysteretic buck converter for portable devices., , and . ISOCC, page 5-8. IEEE, (2012)Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH., , , , , , , , , and . VLSIC, page 136-137. IEEE, (2012)A low-power two-line inversion method for driving LCD panels., , , , and . ISCAS, page 1995-1998. IEEE, (2012)10.4 A 5.8Gb/s adaptive integrating duobinary-based DFE receiver for multi-drop memory interface., , , , , , , and . ISSCC, page 1-3. IEEE, (2015)CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control., , , and . ISCAS, page 3094-3097. IEEE, (2008)Novel Low-Voltage Small-Area I/O Buffer for Mixed-Voltage Application., , , and . FGIT-CA/CES3, volume 256 of Communications in Computer and Information Science, page 364-370. Springer, (2011)High speed VLSI logic simulation using bitwise operations and parallel processing., , , and . ICCD, page 171-174. IEEE Computer Society, (1990)A 512 Mb Two-Channel Mobile DRAM (OneDRAM) With Shared Memory Array., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 43 (11): 2381-2389 (2008)1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture., , , , , , , , , and 5 other author(s). ISSCC, page 128-129. IEEE, (2009)