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Disambiguation of "Lee, Donghyuk"

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A 512 Mb Two-Channel Mobile DRAM (OneDRAM) With Shared Memory Array.

, , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 43 (11): 2381-2389 (2008)

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Xavier Lee Lee

Bongsoo Lee

The role of negative regulators in coordination of the Myxococcus xanthus developmental program. Uni Marburg, (2009)

Min-Hi Lee

Induction and regulation of antiviral defence mechanisms through intracytoplasmic sensors. HU Berlin, (2009)

Hyemin Lee

Viktor Lee

 

Other publications of authors with the same name

DTN-SMTP: A Novel Mail Transfer Protocol with Minimized Interactions for Space Internet., , , , and . ICCSA (1), volume 12249 of Lecture Notes in Computer Science, page 322-331. Springer, (2020)Exploiting the DRAM Microarchitecture to Increase Memory-Level Parallelism., , , , and . CoRR, (2018)Reducing DRAM Refresh Overheads with Refresh-Access Parallelism., , , , , , and . CoRR, (2018)Improved performance of a low-cost PDR system through sensor calibration and analysis., , , and . AIM, page 1747-1752. IEEE, (2014)A Case for Memory Content-Based Detection and Mitigation of Data-Dependent Failures in DRAM., , , , and . IEEE Comput. Archit. Lett., 16 (2): 88-93 (2017)GRIM-Filter: Fast Seed Location Filtering in DNA Read Mapping Using Processing-in-Memory Technologies., , , , , , , , , and . CoRR, (2017)Saving PAM4 Bus Energy with SMOREs: Sparse Multi-level Opportunistic Restricted Encodings., , , , and . HPCA, page 1001-1013. IEEE, (2022)Learning Sparse Matrix Row Permutations for Efficient SpMM on GPU Architectures., , , , , and . ISPASS, page 48-58. IEEE, (2021)Tiered-latency DRAM: A low latency and low cost DRAM architecture., , , , , and . HPCA, page 615-626. IEEE Computer Society, (2013)Architecting an Energy-Efficient DRAM System for GPUs., , , , , , and . HPCA, page 73-84. IEEE Computer Society, (2017)