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Verification of Embedded Memory Systems using Efficient Memory Modeling.

M. Ganai, A. Gupta, and P. Ashar. DATE, page 1096-1101. IEEE Computer Society, (2005)

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Ashar Javed

Pranav Tendulkar

Pranav Oberoi

Mohamed Ashari

Siamak Asharin-Fard

Other publications of authors with the same name

Verification of Embedded Memory Systems using Efficient Memory ModelingM. Ganai, A. Gupta, and P. Ashar. CoRR, (2007)Exploiting Retiming in a Guided Simulation Based Validation Methodology.A. Gupta, P. Ashar, and S. Malik. CHARME, volume 1703 of Lecture Notes in Computer Science, page 350-353. Springer, (1999)An Edge-endpoint-based Configurable Hardware Architecture for VLSI Layout Design Rule Checking.Z. Luo, M. Martonosi, and P. Ashar. VLSI Design, 10 (3): 249-263 (2000)Efficient SAT-based bounded model checking for software verification.F. Ivancic, Z. Yang, M. Ganai, A. Gupta, and P. Ashar. Theor. Comput. Sci., 404 (3): 256-274 (2008)Efficient distributed SAT and SAT-based distributed Bounded Model Checking.M. Ganai, A. Gupta, Z. Yang, and P. Ashar. Int. J. Softw. Tools Technol. Transf., 8 (4-5): 387-396 (2006)Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver.M. Ganai, P. Ashar, A. Gupta, L. Zhang, and S. Malik. DAC, page 747-750. ACM, (2002)Property-specific witness graph generation for guided simulation.A. Casavant, A. Gupta, S. Liu, A. Mukaiyama, K. Wakabayashi, and P. Ashar. DATE, page 799. IEEE Computer Society, (2001)Verification of Embedded Memory Systems using Efficient Memory Modeling.M. Ganai, A. Gupta, and P. Ashar. DATE, page 1096-1101. IEEE Computer Society, (2005)Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs.A. Gupta, Z. Yang, P. Ashar, L. Zhang, and S. Malik. ICCAD, page 286-292. IEEE Computer Society, (2001)Panel: Assertion-Based Verification -What's the Big Deal?S. Shukla, A. Hu, J. Abrahams, P. Ashar, H. Foster, A. Landver, and C. Pixley. HLDVT, page 183. IEEE Computer Society, (2006)

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Disambiguation of "Ashar, Pranav"

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Verification of Embedded Memory Systems using Efficient Memory Modeling.

Please choose a person to relate this publication to

Ashar Javed

Pranav Tendulkar

Pranav Oberoi

Mohamed Ashari

Siamak Asharin-Fard

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Ashar, Pranav"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Verification of Embedded Memory Systems using Efficient Memory Modeling.

Please choose a person to relate this publication to

Ashar Javed

Pranav Tendulkar

Pranav Oberoi

Mohamed Ashari

Siamak Asharin-Fard

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Verification of Embedded Memory Systems using Efficient Memory Modeling.