Author of the publication

A networks-on-chip emulation/verification framework.

, , , , , , , and . Int. J. High Perform. Syst. Archit., 3 (1): 2-11 (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Global Co-Saliency Guided Bit Allocation for Light Field Image Compression., , , , and . DCC, page 608. IEEE, (2019)A novel energy-efficient serializer design method for gigascale systems., , and . ISCAS, page 1978-1981. IEEE, (2013)A new fault injection method for evaluation of combining SEU and SET effects on circuit reliability., , , and . ISCAS, page 602-605. IEEE, (2014)A novel signaling technique for high-speed wireline backplane transceiver: Four phase-shifted sinusoid symbol (PSS-4)., , and . ISCAS, page 2141-2144. IEEE, (2014)A 12-Bit Column-Parallel Two-Step Single-Slope ADC With a Foreground Calibration for CMOS Image Sensors., , , , , and . IEEE Access, (2020)A networks-on-chip emulation/verification framework., , , , , , , and . Int. J. High Perform. Syst. Archit., 3 (1): 2-11 (2011)Hierarchical Independent Coding Scheme for Varifocal Multiview Images Based on Angular-Focal Joint Prediction., , , , and . IEEE Trans. Multim., (2024)A 0.053 mm2 10-bit 10-ks/s 40-nW SAR ADC with pseudo single ended switching procedure for bio-related applications., , , , , and . Microelectron. J., (September 2023)A 12bit 250 MS/s 5.43fJ/conversion-step SAR ADC with adaptive asynchronous logic in 28 nm CMOS., , , , , , , , and . Microelectron. J., (2022)U-TEN: An Unsupervised Two-Branch Enhancement Network for Object Detection Under Complex-Light Condition., , , , , and . ICIG (5), volume 14359 of Lecture Notes in Computer Science, page 320-331. Springer, (2023)