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SLOCOP-II: a versatile timing verification system for MOSVLSI.

, , , and . EURO-DAC, page 518-523. IEEE Computer Society, (1990)

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SPI: an open interface integrating highly interactive electronic CAD tools., , , and . EURO-DAC, page 492-495. IEEE Computer Society, (1990)Formal Hardware Verification in HOL and in Boyer-Moore: A Comparative Analysis., , , and . TPHOLs, page 340-347. IEEE Computer Society, (1991)An Evaluation of Different Handwriting Observation Techniques from a Signature Verification Point of View., and . BSDIA, volume 1339 of Lecture Notes in Computer Science, page 273-282. Springer, (1997)Efficient false path elimination algorithms for timing verification by event graph preprocessing., , , , , and . Integr., 8 (2): 173-187 (1989)On the use of hierarchy in timing verification with statically sensitizable paths., , and . Great Lakes Symposium on VLSI, page 4-8. IEEE, (1992)On-line signature verification by dynamic time-warping., and . ICPR, page 38-42. IEEE Computer Society, (1996)A formal verification technique for embedded software., and . ICCD, page 352-357. IEEE Computer Society, (1996)The Formal Semantics Definition of a Multi-Rate DSP Specification Language in HOL., , and . TPHOLs, volume A-20 of IFIP Transactions, page 375-394. North-Holland/Elsevier, (1992)Feedback Loops and Large Subcircuits in the Multiprocessor Implementation of a Relaxation Based Circuit Simulator., , and . DAC, page 25-30. ACM Press, (1989)Degrees of Formality in Shallow Embedding Hardware Description Languages in HOL., , and . HUG, volume 780 of Lecture Notes in Computer Science, page 89-100. Springer, (1993)