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SLOCOP-II: a versatile timing verification system for MOSVLSI.

, , , and . EURO-DAC, page 518-523. IEEE Computer Society, (1990)

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Performance Through Hierarchy in Static Timing Verification., , and . IFIP Congress (1), volume A-12 of IFIP Transactions, page 703-709. North-Holland, (1992)An intelligent module generator environment., , , and . DAC, page 730-735. IEEE Computer Society Press, (1986)Design technology research for the nineties: more of the same?. EURO-DAC, page 592-596. IEEE Computer Society Press, (1992)Efficient CAD tools for the coefficient optimisation of arbitrary integrated digital filters., , and . ICASSP, page 602-605. IEEE, (1984)On the impact of multi-antenna RF transceivers' amplitude and phase mismatches on transmit MRC., , , , , and . ICASSP (4), page 893-896. IEEE, (2005)OFDM vs. single-carrier: a multi-antenna comparison., , , and . ICASSP (4), page 753-756. IEEE, (2004)Impact of technology scaling on substrate noise generation mechanisms mixed signal ICs., , , , , and . CICC, page 501-504. IEEE, (2004)Control flow optimization for fast system simulation and storage minimization., , , , and . EDAC-ETC-EUROASIC, page 20-24. IEEE Computer Society, (1994)Compensation of IQ imbalance and phase noise in OFDM systems., , , , , , and . IEEE Trans. Wirel. Commun., 4 (3): 872-877 (2005)Background memory area estimation for multidimensional signal processing systems., , and . IEEE Trans. Very Large Scale Integr. Syst., 3 (2): 157-172 (1995)