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Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption., , and . FPGA, page 220. ACM, (2000)Node merging: A transformation on bit-level dependence graphs for efficient VLSI array design., and . ASAP, page 442-453. IEEE, (1993)Differential current-sensing for on-chip interconnects., and . IEEE Trans. Very Large Scale Integr. Syst., 12 (12): 1321-1329 (2004)Wave-pipelining: a tutorial and research survey., , , and . IEEE Trans. Very Large Scale Integr. Syst., 6 (3): 464-474 (1998)Repeater and current-sensing hybrid circuits for on-chip interconnects., and . ACM Great Lakes Symposium on VLSI, page 269-272. ACM, (2003)Boosters for driving long on-chip interconnects: design issues, interconnect synthesis and comparison with repeaters., and . ISPD, page 204-211. ACM, (2001)Modeling and Experimental Demonstration of Accelerated Self-Healing Techniques., , and . DAC, page 171:1-171:6. ACM, (2014)Leakage-based differential power analysis (LDPA) on sub-90nm CMOS cryptosystems., and . ISCAS, page 252-255. IEEE, (2008)Vlsi Array Architectures for Pyramid Vector Quantization., and . VLSI Signal Processing, 18 (2): 141-154 (1998)Low power on-chip thermal sensors based on wires., and . VLSI-SoC, page 258-263. IEEE, (2007)