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A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.

Z. Chen, P. Ananthanarayanan, S. Biswas, B. Campbell, H. Chen, S. Desai, D. Go, R. Goel, V. von Kaenel, J. Kassoff, F. Klass, W. Ku, T. Li, J. Lin, K. Malik, A. Mehta, D. Murray, E. Shiu, C. Shuler, S. Santhanam, G. Scott, J. Sugisawa, T. Takayanagi, H. Tarn, P. Trivedi, J. Wang, R. Wen, and J. Yong. ISSCC, page 104-105. IEEE, (2007)

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Volker Kläss

Bernhard Kläß

Reinhold Klass

Sylvia Klass

Peter Kläss

Other publications of authors with the same name

A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors.F. Klass, C. Amir, A. Das, K. Aingaran, C. Truong, R. Wang, A. Mehta, R. Heald, and G. Yee. IEEE J. Solid State Circuits, 34 (5): 712-716 (1999)DFM in practice: hit or hype?J. Rey, N. Nagaraj, A. Kahng, F. Klass, R. Aitken, C. Hou, L. Capodieci, and V. Singh. DAC, page 898-899. ACM, (2008)Forum: Wave-pipelining: Is it Practical?W. Burleson, L. Cotten, F. Klass, and M. Ciesielski. ISCAS, page 163-166. IEEE, (1994)Efficient Systolic Array for Matrix Multiplication.F. Klass, and U. Weiser. ICPP (3), page 21-25. CRC Press, (1991)A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.Z. Chen, P. Ananthanarayanan, S. Biswas, B. Campbell, H. Chen, S. Desai, D. Go, R. Goel, V. von Kaenel, J. Kassoff and 18 other author(s). ISSCC, page 104-105. IEEE, (2007)A third-generation SPARC V9 64-b microprocessor.R. Heald, K. Aingaran, C. Amir, M. Ang, M. Boland, P. Dixit, G. Gouldsberry, D. Greenley, J. Grinberg, J. Hart and 21 other author(s). IEEE J. Solid State Circuits, 35 (11): 1526-1538 (2000)Fast multiplication in VLSI using wave pipelining techniques.F. Klass, M. Flynn, and A. van de Goor. J. VLSI Signal Process., 7 (3): 233-248 (1994)Coupling Noise Analysis for VLIS and ULSI Circuits.K. Aingaran, F. Klass, C. Kim, C. Amir, J. Mitra, E. You, J. Mohd, and S. keung Dong. ISQED, page 485-490. IEEE Computer Society, (2000)A 16x16-bit Static CMOS Wave-Pipelined Multiplier.F. Klass, M. Flynn, and A. van de Goor. ISCAS, page 143-146. IEEE, (1994)Wave-pipelining: a tutorial and research survey.W. Burleson, M. Ciesielski, F. Klass, and W. Liu. IEEE Trans. Very Large Scale Integr. Syst., 6 (3): 464-474 (1998)

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Disambiguation of "Klass, Fabian"

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A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.

Please choose a person to relate this publication to

Volker Kläss

Bernhard Kläß

Reinhold Klass

Sylvia Klass

Peter Kläss

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Klass, Fabian"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.

Please choose a person to relate this publication to

Volker Kläss

Bernhard Kläß

Reinhold Klass

Sylvia Klass

Peter Kläss

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.