Author of the publication

CN: Verifying Systems C Code with Separation-Logic Refinement Types.

, , , , , and . Proc. ACM Program. Lang., 7 (POPL): 1-32 (January 2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Isla: Integrating Full-Scale ISA Semantics and Axiomatic Concurrency Models., , , , and . CAV (1), volume 12759 of Lecture Notes in Computer Science, page 303-316. Springer, (2021)Simplifying ARM concurrency: multicopy-atomic axiomatic and operational models for ARMv8., , , , , and . Proc. ACM Program. Lang., 2 (POPL): 19:1-19:29 (2018)CN: Verifying Systems C Code with Separation-Logic Refinement Types., , , , , and . Proc. ACM Program. Lang., 7 (POPL): 1-32 (January 2023)Promising-ARM/RISC-V: a simpler and faster operational concurrency model., , , , and . PLDI, page 1-15. ACM, (2019)Relaxed virtual memory in Armv8-A (extended version)., , , , , and . CoRR, (2022)Relaxed virtual memory in Armv8-A., , , , , and . ESOP, volume 13240 of Lecture Notes in Computer Science, page 143-173. Springer, (2022)ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS., , , , , , , , , and 4 other author(s). Proc. ACM Program. Lang., 3 (POPL): 71:1-71:31 (2019)ARMv8-A System Semantics: Instruction Fetch in Relaxed Architectures., , , , , , and . ESOP, volume 12075 of Lecture Notes in Computer Science, page 626-655. Springer, (2020)Mixed-size concurrency: ARM, POWER, C/C++11, and SC., , , , , , , , and . POPL, page 429-442. ACM, (2017)Modelling the ARMv8 architecture, operationally: concurrency and ISA., , , , , , , and . POPL, page 608-621. ACM, (2016)