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3D integration: Circuit design, test, and reliability challenges.

N. Minas, I. Wolf, E. Marinissen, M. Stucchi, H. Oprins, A. Mercha, G. der Plas, D. Velenis, and P. Marchal. IOLTS, page 217. IEEE Computer Society, (2010)

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Kai Marchal

Stephanie Marchal

Johanna Pol

Pol Schumacher

Maud Marchal

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Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture.J. Guo, A. Papanikolaou, P. Marchal, and F. Catthoor. SLIP, page 75-81. ACM, (2006)3D integration: Circuit design, test, and reliability challenges.N. Minas, I. Wolf, E. Marinissen, M. Stucchi, H. Oprins, A. Mercha, G. der Plas, D. Velenis, and P. Marchal. IOLTS, page 217. IEEE Computer Society, (2010)Architectures and Circuits for Software-Defined Radios: Scaling and Scalability for Low Cost and Low Energy.L. der Perre, B. Bougard, J. Craninckx, W. Dehaene, L. Hollevoet, M. Jayapala, P. Marchal, M. Miranda, P. Raghavan, T. Schuster and 3 other author(s). ISSCC, page 568-569. IEEE, (2007)3D NoCs - Unifying inter & intra chip communication.I. Loi, P. Marchal, A. Pullini, and L. Benini. ISCAS, page 3337-3340. IEEE, (2010)At Tape-out: Can System Yield in Terms of Timing/Energy Specifications Be Predicted?A. Papanikolaou, M. Miranda, P. Marchal, B. Dierickx, and F. Catthoor. CICC, page 773-778. IEEE, (2007)3D heterogeneous system integration: application driver for 3D technology development.E. Beyne, P. Marchal, and G. der Plas. DAC, page 213. ACM, (2011)3-D stacked die: now or future?S. Bansal, J. Rey, A. Yang, M. Jang, L. Lu, P. Magarshack, P. Marchal, and R. Radojcic. DAC, page 298-299. ACM, (2010)A calibrated pathfinding model for signal integrity analysis on interposer.J. Kim, S. Kim, J. Ryckaert, M. Detalle, N. Hoovels, and P. Marchal. CICC, page 1-4. IEEE, (2012)Design issues and considerations for low-cost 3D TSV IC technology.G. der Plas, P. Limaye, A. Mercha, H. Oprins, C. Torregiani, S. Thijs, D. Linten, M. Stucchi, G. Katti, D. Velenis and 24 other author(s). ISSCC, page 148-149. IEEE, (2010)Pathfinding: A design methodology for fast exploration and optimisation of 3D-stacked integrated circuits.D. Milojevic, R. Radojcic, R. Carpenter, and P. Marchal. SoC, page 118-123. IEEE, (2009)

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Disambiguation of "Marchal, Pol"

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3D integration: Circuit design, test, and reliability challenges.

Please choose a person to relate this publication to

Kai Marchal

Stephanie Marchal

Johanna Pol

Pol Schumacher

Maud Marchal

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Marchal, Pol"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 3D integration: Circuit design, test, and reliability challenges.

Please choose a person to relate this publication to

Kai Marchal

Stephanie Marchal

Johanna Pol

Pol Schumacher

Maud Marchal

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

3D integration: Circuit design, test, and reliability challenges.