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Comparison of an Æthereal Network on Chip and Traditional Interconnects - Two Case Studies.

, , , , , , , , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 317-336. Springer, (2006)

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Predictable Embedded Multiprocessor System Design., , , , , and . SCOPES, volume 3199 of Lecture Notes in Computer Science, page 77-91. Springer, (2004)Hierarchical Programming Language for Modal Multi-rate Real-Time Stream Processing Applications., , and . ICPP Workshops, page 453-460. IEEE Computer Society, (2014)Power-efficient layered turbo decoder processor., , , , , , and . DATE, page 246-251. IEEE Computer Society, (2001)Online resource management in a multiprocessor with a network-on-chip., , and . SAC, page 1557-1564. ACM, (2007)Dataflow models for shared memory access latency analysis., and . EMSOFT, page 275-284. ACM, (2009)Phase coupled operation assignment for VLIW processors with distributed register files., , and . ISSS, page 118-123. ACM / IEEE Computer Society, (2001)From dataflow analysis basics to the programming of ASICs.. SCOPES, page 1. ACM, (2016)Task-level timing models for guaranteed performance in multiprocessor networks-on-chip., , , , and . CASES, page 63-72. ACM, (2003)Low-cost guaranteed-throughput dual-ring communication infrastructure for heterogeneous MPSoCs., , , and . DASIP, page 1-8. IEEE, (2014)Decoupling of Computation and Communication with a Communication Assist., , , and . DSD, page 63-68. IEEE Computer Society, (2007)