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Constructive Common-Centroid Placement and Routing for Binary-Weighted Capacitor Arrays.

N. Karmokar, A. Sharma, J. Poojary, M. Madhusudan, R. Harjani, and S. Sapatnekar. DATE, page 166-171. IEEE, (2022)

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Madhusudan Govind Kher

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Design Techniques for Zero Steady-State Output Ripple in Digital Low Dropout Regulators.S. Chaubey, M. Madhusudan, and R. Harjani. MWSCAS, page 1041-1044. IEEE, (2019)Analog Layout Generation using Optimized Primitives.M. Madhusudan, A. Sharma, Y. Li, J. Hu, S. Sapatnekar, and R. Hajiani. DATE, page 1234-1239. IEEE, (2021)A general approach for identifying hierarchical symmetry constraints for analog circuit layout.K. Kunal, J. Poojary, T. Dhar, M. Madhusudan, R. Harjani, and S. Sapatnekar. ICCAD, page 120:1-120:8. IEEE, (2020)Learning from Experience: Applying ML to Analog Circuit Design.K. Kunal, T. Dhar, Y. Li, M. Madhusudan, J. Poojary, A. Sharma, W. Xu, S. Burns, R. Harjani, J. Hu and 2 other author(s). ISPD, page 55. ACM, (2020)From Specification to Silicon: Towards Analog/Mixed-Signal Design Automation using Surrogate NN Models with Transfer Learning.J. Liu, S. Su, M. Madhusudan, M. Hassanpourghadi, S. Saunders, Q. Zhang, R. Rasul, Y. Li, J. Hu, A. Sharma and 5 other author(s). ICCAD, page 1-9. IEEE, (2021)Common-Centroid Layout for Active and Passive Devices: A Review and the Road Ahead.N. Karmokar, M. Madhusudan, A. Sharma, R. Harjani, M. Lin, and S. Sapatnekar. ASP-DAC, page 114-121. IEEE, (2022)Common-Centroid Layouts for Analog Circuits: Advantages and Limitations.A. Sharma, M. Madhusudan, S. Burns, P. Mukherjee, S. Yaldiz, R. Harjani, and S. Sapatnekar. DATE, page 1224-1229. IEEE, (2021)Machine Learning Techniques in Analog Layout Automation.T. Dhar, K. Kunal, Y. Li, Y. Lin, M. Madhusudan, J. Poojary, A. Sharma, S. Burns, R. Harjani, J. Hu and 3 other author(s). ISPD, page 71-72. ACM, (2021)A Customized Graph Neural Network Model for Guiding Analog IC Placement.Y. Li, Y. Lin, M. Madhusudan, A. Sharma, W. Xu, S. Sapatnekar, R. Harjani, and J. Hu. ICCAD, page 135:1-135:9. IEEE, (2020)MMM: Machine Learning-Based Macro-Modeling for Linear Analog ICs and ADC/DACs.Y. Lin, Y. Li, M. Madhusudan, S. Sapatnekar, R. Harjani, and J. Hu. MLCAD, page 1-6. IEEE, (2023)

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Disambiguation of "Madhusudan, Meghna"

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Constructive Common-Centroid Placement and Routing for Binary-Weighted Capacitor Arrays.

Please choose a person to relate this publication to

Madhusudan Govind Kher

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Madhusudan, Meghna"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Constructive Common-Centroid Placement and Routing for Binary-Weighted Capacitor Arrays.

Please choose a person to relate this publication to

Madhusudan Govind Kher

Other publications of authors with the same name

Disambiguation

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Constructive Common-Centroid Placement and Routing for Binary-Weighted Capacitor Arrays.