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Multiple-parameter CMOS IC testing with increased sensitivity for IDDQ.

, , , and . IEEE Trans. Very Large Scale Integr. Syst., 11 (5): 863-870 (2003)

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Test Methodologies in the Deep Submicron Era - Analog, Mixed-Signal, and RF., , , and . VLSI Design, page 12-13. IEEE Computer Society, (2005)Parameter variations and impact on circuits and microarchitecture., , , , , and . DAC, page 338-342. ACM, (2003)Adaptive circuit techniques to minimize variation impacts on microprocessor performance and power., , , and . ISCAS (1), page 9-12. IEEE, (2005)Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs., , , , , , , and . ISLPED, page 207-212. ACM, (2001)FerroElectronics for Edge Intelligence., , , , and . IEEE Micro, 40 (6): 33-48 (2020)Modeling soil cation exchange capacity using soil parameters: Assessing the heuristic models., , , , , , and . Comput. Electron. Agric., (2017)A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs., , , , and . DATE, page 206-211. IEEE Computer Society, (2005)Within Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism., , , , and . ITC, page 1276-1284. IEEE Computer Society, (2004)Thermal Management of High Performance Microprocessors., , , and . DFT, page 313-319. IEEE Computer Society, (2003)EP3: Empowering the killer SoC applications of 2020., , , and . ISSCC, page 517. IEEE, (2013)