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Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation.

K. Campbell, L. He, L. Yang, S. Gurumani, K. Rupnow, and D. Chen. DAC, page 7:1-7:6. ACM, (2016)

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Liu Deming

Deming Sun

Deming Kong

Chen Chen

Other publications of authors with the same name

Behavioral-level IP integration in high-level synthesis.L. Yang, S. Gurumani, D. Chen, and K. Rupnow. FPT, page 172-175. IEEE, (2015)Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis.M. Gholipour, Y. Chen, A. Sangai, N. Masoumi, and D. Chen. IEEE Trans. Very Large Scale Integr. Syst., 24 (2): 650-663 (2016)Introduction.D. Chen. ACM Trans. Reconfigurable Technol. Syst., 9 (4): 28:1-28:2 (2016)Fast large-scale optimal power flow analysis for smart grid through network reduction.Y. Liang, and D. Chen. ASP-DAC, page 373-378. IEEE, (2014)High-level synthesis with behavioral level multi-cycle path analysis.H. Zheng, S. Gurumani, L. Yang, D. Chen, and K. Rupnow. FPL, page 1-8. IEEE, (2013)Performance-driven mapping for CPLD architectures.D. Chen, J. Cong, M. Ercegovac, and Z. Huang. FPGA, page 39-47. ACM, (2001)A SPICE-compatible model of graphene nano-ribbon field-effect transistors enabling circuit-level delay and power analysis under process variation.Y. Chen, A. Rogachev, A. Sangai, G. Iannaccone, G. Fiori, and D. Chen. DATE, page 1789-1794. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Flexible transition metal dichalcogenide field-effect transistors: A circuit-level simulation study of delay and power under bending, process variation, and scaling.Y. Chen, M. Gholipour, and D. Chen. ASP-DAC, page 761-768. IEEE, (2016)Algorithm/Accelerator Co-Design and Co-Search for Edge AI.X. Zhang, Y. Li, J. Pan, and D. Chen. IEEE Trans. Circuits Syst. II Express Briefs, 69 (7): 3064-3070 (2022)VecQ: Minimal Loss DNN Model Compression With Vectorized Weight Quantization.C. Gong, Y. Chen, Y. Lu, T. Li, C. Hao, and D. Chen. IEEE Trans. Computers, 70 (5): 696-710 (2021)

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Disambiguation of "Chen, Deming"

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Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation.

Please choose a person to relate this publication to

Liu Deming

Deming Sun

Deming Kong

Deming Kong

Chen Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chen, Deming"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation.

Please choose a person to relate this publication to

Liu Deming

Deming Sun

Deming Kong

Deming Kong

Chen Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation.