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A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks.

M. Singh, P. Singh, U. Chichhula, H. Mehra, D. Das, and M. Sakare. Circuits Syst. Signal Process., 42 (11): 6813-6828 (November 2023)

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Romy Das

Bio-economic modeling of soil resource conservation in Mid Hill Region of NepalR. Das. Uni Gießen, (2009)

Anita Das

Arabindo Das

Amitabh Das

Animesh Das

Other publications of authors with the same name

A Double Cross-Coupled Delay Cell for High-Frequency Differential Ring VCOs.M. Singh, M. Gautam, P. Singh, R. Nagulapalli, D. Das, and M. Sakare. APCCAS, page 1-5. IEEE, (2023)A Low-Overhead PUF Based Hardware Security Technique to Prevent Scan Chain Attacks for Industry-Standard DFT Architecture.S. Chittoriya, Shivdeep, K. Jha, D. Das, and R. Sharma. MWSCAS, page 1-4. IEEE, (2022)Optimization of Slew Mitigation Capacitor in Passive Charge Compensation-Based Delta-Sigma Modulator.M. Saeed, M. Kumar, B. Umapathi, and D. Das. IEEE Trans. Circuits Syst. II Express Briefs, 70 (6): 1821-1825 (June 2023)Full CMOS Implementation of Bidirectional Associative Memory Neural Network with Analog Memristive Synapse.S. Vohra, S. Thomas, M. Sakare, and D. Das. MWSCAS, page 445-448. IEEE, (2021)Analysis of Parasitics on CMOS based Memristor Crossbar Array for Neuromorphic Systems.S. Thomas, S. Vohra, R. Kumar, R. Sharma, and D. Das. MWSCAS, page 309-312. IEEE, (2021)Analytical Modelling of a CMOS Inter Spike Interval Decoder for Resistive Crossbar based Brain Inspired Computing.S. Vohra, S. Thomas, M. Sakare, and D. Das. VDAT, page 1-4. IEEE, (2021)A Robust Training Signal Generator for Trainable Memristive Digital to Analog Converter.Shivdeep, S. Vohra, N. Goel, and D. Das. iSES, page 1-5. IEEE, (2021)Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons.S. Vohra, S. Thomas, M. Sakare, and D. Das. Integr., (March 2024)Full CMOS Circuit for Brain-Inspired Associative Memory With On-Chip Trainable Memristive STDP Synapse.S. Vohra, S. Thomas, Shivdeep, M. Sakare, and D. Das. IEEE Trans. Very Large Scale Integr. Syst., 31 (7): 993-1003 (2023)Design and development of an Internet-of-Things enabled wearable ExG measuring system with a novel signal processing algorithm for electrocardiogram.D. Das, A. Vidwans, A. Srivastava, M. Ahmad, S. Vaishnav, S. Dewan, and M. Baghini. IET Circuits Devices Syst., 13 (6): 903-907 (2019)

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Disambiguation of "Das, Devarshi Mrinal"

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A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks.

Please choose a person to relate this publication to

Romy Das

Anita Das

Arabindo Das

Amitabh Das

Animesh Das

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Das, Devarshi Mrinal"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks.

Please choose a person to relate this publication to

Romy Das

Anita Das

Arabindo Das

Amitabh Das

Animesh Das

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks.