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Transformative Hardware Design Following the Model-Driven Architecture Vision.

, , , , , , , and . VLSI-SoC (Selected Papers), volume 661 of IFIP Advances in Information and Communication Technology, page 49-70. Springer, (2021)

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Transformative Hardware Design Following the Model-Driven Architecture Vision., , , , , , , and . VLSI-SoC (Selected Papers), volume 661 of IFIP Advances in Information and Communication Technology, page 49-70. Springer, (2021)HW-Acceleration for Edge-AI.. Technical University of Munich, Germany, (2024)Aspect-Oriented Design Automation with Model Transformation., , , , , , , and . VLSI-SoC, page 1-6. IEEE, (2021)Optimized HW/FW Generation from an Abstract Register Interface Model., , , , , and . DSD, page 35-39. IEEE, (2020)ISA Modeling with Trace Notation for Context Free Property Generation., , , and . DAC, page 619-624. IEEE, (2021)Automated HW/SW co-design for edge AI: state, challenges and steps ahead., , , , , , , , , and 2 other author(s). CODES+ISSS, page 11-20. ACM, (2021)A Smart HW-Accelerator for Non-uniform Linear Interpolation of ML-Activation Functions., , , and . SAMOS, volume 13511 of Lecture Notes in Computer Science, page 267-282. Springer, (2022)RTL Delay Prediction Using Neural Networks., , , , and . NorCAS, page 1-7. IEEE, (2021)Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models., , , , , , , and . DFT, page 1-6. IEEE, (2021)