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Graph4Med: a web application and a graph database for visualizing and analyzing medical databases.

, , , , and . BMC Bioinform., 23 (1): 537 (2022)

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Spatially-Varying Image Warping: Evaluations and VLSI Implementations., , , , , , and . VLSI-SoC (Selected Papers), volume 418 of IFIP Advances in Information and Communication Technology, page 64-87. Springer, (2012)Measurement of high-speed ADCs., and . CICC, page 1-7. IEEE, (2017)A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver With Low-Latency Digital CDR in 14-nm CMOS FinFET., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 53 (4): 1227-1237 (2018)A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 52 (12): 3458-3473 (2017)Background calibration using noisy reference ADC for a 12 b 600 MS/s 2 × TI SAR ADC in 14nm CMOS FinFET., , , , , , , , , and 2 other author(s). ESSCIRC, page 183-186. IEEE, (2017)A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET., , , , , , , , , and 5 other author(s). ISSCC, page 476-478. IEEE, (2019)A 24-72-GS/s 8-b Time-Interleaved SAR ADC With 2.0-3.3-pJ/Conversion and >30 dB SNDR at Nyquist in 14-nm CMOS FinFET., , , , , , , , , and . IEEE J. Solid State Circuits, 53 (12): 3508-3516 (2018)Design considerations for 50G+ backplane links., , , , , , , , , and 1 other author(s). ESSCIRC, page 477-482. IEEE, (2016)A 112Gb/S 2.6pJ/b 8-Tap FFE PAM-4 SST TX in 14nm CMOS., , , , , , , , , and . ISSCC, page 104-106. IEEE, (2018)28.5 A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET., , , , , , , , , and 1 other author(s). ISSCC, page 474-475. IEEE, (2017)