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Klessydra-T: Designing Vector Coprocessors for Multi-Threaded Edge-Computing Cores., , , , , и . CoRR, (2020)A Novel FPGA Implementation of the NAND-PUF with Minimal Resource Usage and High Reliability., и . Cryptogr., 7 (2): 18 (июня 2023)A Novel Ultra-Compact FPGA PUF: The DD-PUF., , и . Cryptogr., 5 (3): 23 (2021)Design of Low-Voltage High-Speed CML D-Latches in Nanometer CMOS Technologies., , , и . IEEE Trans. Very Large Scale Integr. Syst., 25 (12): 3509-3520 (2017)Design-oriented models for quick estimation of path delay variability via the fan-out-of-4 metric., , и . ISCAS, стр. 1-4. IEEE, (2017)A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic With Complementary n- and p-type Flip-Flops., , и . IEEE Trans. Very Large Scale Integr. Syst., 29 (5): 998-1008 (2021)A Biasing Approach to Design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs., , , и . IEEE Access, (2022)A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers., , , и . IEEE Access, (2022)Exploiting the DD-Cell as an Ultra-Compact Entropy Source for an FPGA-Based Re-Configurable PUF-TRNG Architecture., и . IEEE Access, (2023)Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications., , , и . IEEE Access, (2024)