Author of the publication

Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1479-1492 (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Adaptive chip-package thermal analysis for synthesis and design., , , , and . DATE, page 844-849. European Design and Automation Association, Leuven, Belgium, (2006)ISAC: Integrated Space-and-Time-Adaptive Chip-Package Thermal Analysis., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (1): 86-99 (2007)Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors., , , , and . DAC, page 312-317. IEEE, (2007)Incremental exploration of the combined physical and behavioral design space., , , and . DAC, page 208-213. ACM, (2005)TAPHS: thermal-aware unified physical-level and high-level synthesis., , , , and . ASP-DAC, page 879-885. IEEE, (2006)Application-Specific MPSoC Reliability Optimization., , , and . IEEE Trans. Very Large Scale Integr. Syst., 16 (5): 603-608 (2008)Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design., , , , and . ICCAD, page 575-582. ACM, (2006)Unified Incremental Physical-Level and High-Level Synthesis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (9): 1576-1588 (2007)Reliable multiprocessor system-on-chip synthesis., , , and . CODES+ISSS, page 239-244. ACM, (2007)Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1479-1492 (2008)