Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

On-chip circuit for measuring multi-GHz clock signal waveforms., , , , , and . VTS, page 1-4. IEEE Computer Society, (2013)Resonant clock mega-mesh for the IBM z13TM., , , , , , , , , and 2 other author(s). VLSIC, page 322-. IEEE, (2015)Characterization of the impact of interconnect design on the capacitive load driven by a global clock distribution., , , , and . ACM Great Lakes Symposium on VLSI, page 38-43. ACM, (2005)A Resonant Global Clock Distribution for the Cell Broadband Engine Processor., , , , , , , , , and . IEEE J. Solid State Circuits, 44 (1): 64-72 (2009)Loop-based interconnect modeling and optimization approach for multigigahertz clock network design., , , , , and . IEEE J. Solid State Circuits, 38 (3): 457-463 (2003)Loop-based interconnect modeling and optimization approach for multi-GHz clock network design., , , , and . CICC, page 19-22. IEEE, (2002)Infrastructure requirements for a large-scale, multi-site VLSI development project., , , , and . IBM J. Res. Dev., 46 (1): 87-96 (2002)A Resonant Global Clock Distribution for the Cell Broadband-Engine Processor., , , , , , , , , and . ISSCC, page 512-513. IEEE, (2008)5.3 Wide-frequency-range resonant clock with on-the-fly mode changing for the POWER8TM microprocessor., , , , , , , , , and . ISSCC, page 100-101. IEEE, (2014)