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Disambiguation of "Chang, Ik Joon"

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A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology.

, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , and . ISSCC, page 430-432. IEEE, (2012)

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ng-ik Chang

Ch'un-ik Chang

Valdur Joonso

Maria Joonso

ik TarakçiogÌ0lu

 

Other publications of authors with the same name

CPAC: Energy-Efficient Data Collection through Adaptive Selection of Compression Algorithms for Sensor Networks., , and . Sensors, 14 (4): 6419-6442 (2014)Low complexity image correction using color and focus matching for stereo video coding., , , , and . ISCAS, page 2912-2915. IEEE, (2013)A Radiation-Hardened SAR ADC with Delay-Based Dual Feedback Flip-Flops for Sensor Readout Systems., , , , and . Sensors, 20 (1): 171 (2020)O-2A: Low Overhead DNN Compression with Outlier-Aware Approximation., , and . DAC, page 1-6. IEEE, (2020)SET-Tolerant Active Body-Bias Circuits in PD-SOI CMOS Technology., , and . IEICE Trans. Electron., 98-C (7): 729-733 (2015)High Performance and Hardware Efficient Multiview Video Coding Frame Scheduling Algorithms and Architectures., , and . IEEE Trans. Circuits Syst. Video Techn., 23 (8): 1312-1321 (2013)O-2A: Outlier-Aware Compression for 8-bit Post-Training Quantization Model., and . IEEE Access, (2023)ZEM: Zero-Cycle Bit-Masking Module for Deep Learning Refresh-Less DRAM., , , , and . IEEE Access, (2021)TRIO: a Novel 10T Ternary SRAM Cell for Area-Efficient In-memory Computing of Ternary Neural Networks., , , and . AICAS, page 1-5. IEEE, (2023)TCL: an ANN-to-SNN Conversion with Trainable Clipping Layers., and . DAC, page 793-798. IEEE, (2021)