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A 1.8-pJ/b, 12.5-25-Gb/s Wide Range All-Digital Clock and Data Recovery Circuit.

, , , , , , and . IEEE J. Solid State Circuits, 53 (2): 470-483 (2018)

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CBI: a scalable energy-efficient protocol for metro/access networks., , , , , , , , , and . OnlineGreenComm, page 1-6. IEEE, (2014)A 1.8-pJ/b, 12.5-25-Gb/s Wide Range All-Digital Clock and Data Recovery Circuit., , , , , , and . IEEE J. Solid State Circuits, 53 (2): 470-483 (2018)A 25 Gb/s All-Digital Clock and Data Recovery Circuit for Burst Mode Applications in PONs., , , , , and . ECOC, page 1-3. IEEE, (2017)End-to-end optical packet switching with burst-mode reception at 25 Gb/s through a 1024-port 25.6 Tb/s capacity Hipoλaos Optical Packet Switch., , , , , , , and . ECOC, page 1-4. IEEE, (2020)Influence of Jitter on Limit Cycles in Bang-Bang Clock and Data Recovery Circuits., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1463-1471 (2015)High-Speed SiGe BiCMOS Circuits for Optical Communication., , , , , , , , , and 1 other author(s). BCICTS, page 153-158. IEEE, (2023)Co-designed electro-optical integrated frontend circuits for high speed transceivers., , , , , , , , , and 14 other author(s). OECC/PSC, page 1-3. IEEE, (2022)The Truth About 2-Level Transition Elimination in Bang-Bang PAM-4 CDRs., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (1): 469-482 (2021)