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VLSI logic and fault simulation on general-purpose parallel computers.

, , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (3): 446-460 (1993)

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SNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction., , , , and . ICCAD, page 66-69. IEEE Computer Society, (1990)Algorithm-Based Fault Tolerance for Adaptive Least Squares Lattice Filtering on a Hypercube Multiprocessor., , and . ICPP (3), page 177-180. Pennsylvania State University Press, (1989)0-271-00686-2.Hierarchical multi-level fault simulation of large systems., , , , and . J. Electron. Test., 1 (2): 139-149 (1990)Benchmarking Parallel Processing Platforms: An Applications Perspective., , , and . IEEE Trans. Parallel Distributed Syst., 4 (8): 947-954 (1993)Design of a scalable parallel switch-level simulator for VLSI., , and . SC, page 615-624. IEEE Computer Society, (1990)CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits., , , , and . ICCAD, page 246-249. IEEE Computer Society, (1988)Parallel switch-level simulation for VLSI., , and . EURO-DAC, page 324-328. EEE Computer Society, (1991)Improving Language Containment Using Fairness Graphs., , and . CAV, volume 818 of Lecture Notes in Computer Science, page 391-403. Springer, (1994)VLSI logic and fault simulation on general-purpose parallel computers., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (3): 446-460 (1993)Concurrent Hierarchical and Multilevel Simulation of VLSI Circuits., , , , and . Simulation, 60 (2): 79-91 (1993)