( en | de | ru )

 

Disambiguation of "Kapoor, Hemangee K."

Author of the publication

copydeleteadd this publication to your clipboard
DAMUS: Dynamic Allocation based on Write Frequency in MUlti-Retention STT-RAM based Last Level Caches.

, , , , and . ISQED, page 469-475. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Rishi Kapoor

Pridhee Kapoor

Varun Kapoor

kapoor property

Kalpesh Kapoor

 

Other publications of authors with the same name

ALAMNI: Adaptive LookAside Memory Based Near-Memory Inference Engine for Eliminating Multiplications in Real-Time., , and . IEEE Trans. Computers, 72 (3): 693-706 (March 2023)Improving the Performance of Hybrid Caches Using Partitioned Victim Caching., and . ACM Trans. Embed. Comput. Syst., 20 (1): 5:1-5:27 (2021)Restricting writes for energy-efficient hybrid cache in multi-core architectures., and . VLSI-SoC, page 1-6. IEEE, (2016)Reinforcement Learning Based Refresh Optimized Volatile STT-RAM Cache., and . ISVLSI, page 222-227. IEEE, (2020)Dynamic Associativity Management in Tiled CMPs by Runtime Adaptation of Fellow Sets., and . IEEE Trans. Parallel Distributed Syst., 28 (8): 2229-2243 (2017)A formal framework for interfacing mixed-timing systems., , and . Integr., 46 (3): 255-264 (2013)Performance linked dynamic cache tuning: A static energy reduction approach in tiled CMPs., and . Microprocess. Microsystems, (2017)Victim retention for reducing cache misses in tiled chip multiprocessors., and . Microprocess. Microsystems, 38 (4): 263-275 (2014)Modelling and analysis of wireless communication over Networks-on-Chip., and . VDAT, page 1-6. IEEE, (2014)A Framework for Block Placement, Migration, and Fast Searching in Tiled-DNUCA Architecture., and . ACM Trans. Design Autom. Electr. Syst., 22 (1): 4:1-4:26 (2016)