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Disambiguation of "Tokunaga, Carlos"

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8.4 Post-silicon voltage-guard-band reduction in a 22nm graphics execution core using adaptive voltage scaling and dynamic power gating.

, , , , , , , , and . ISSCC, page 152-153. IEEE, (2016)

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Yasno Tokunaga

Yasuo Tokunaga

Carlos Cardonha

Carlos Bäzner

Carlos Oberacker

 

Other publications of authors with the same name

A fully integrated charge sharing active decap scheme for power supply noise suppression., , , , , and . SoCC, page 374-379. IEEE, (2015)8.6 Enabling wide autonomous DVFS in a 22nm graphics execution core using a digitally controlled hybrid LDO/switched-capacitor VR with fast droop mitigation., , , , , , , , , and 2 other author(s). ISSCC, page 1-3. IEEE, (2015)Timing yield enhancement through soft edge flip-flop based design., , , , , , and . CICC, page 543-546. IEEE, (2008)Adaptive and Resilient Circuits for Dynamic Variation Tolerance., , , , and . IEEE Des. Test, 30 (6): 8-17 (2013)Design for test and reliability in ultimate CMOS., , , , , , , , , and 4 other author(s). DATE, page 677-682. IEEE, (2012)Low-voltage circuit design for widespread sensing applications., , , , , , , , and . ISCAS, page 2558-2561. IEEE, (2008)Dynamic variation monitor for measuring the impact of voltage droops on microprocessor clock frequency., , , , , , , , , and . CICC, page 1-4. IEEE, (2010)Aging-aware Adaptive Voltage Scaling in 22nm high-K/metal-gate tri-gate CMOS., , , , and . CICC, page 1-4. IEEE, (2015)Secure AES engine with a local switched-capacitor current equalizer., and . ISSCC, page 64-65. IEEE, (2009)A 2.3nJ/frame Voice Activity Detector based audio front-end for context-aware System-on-Chip applications in 32nm CMOS., , , , , and . CICC, page 1-4. IEEE, (2012)