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Efficient Implementation of Application-Aware Spinlock Control in MPSoCs.

, , , , , , and . Int. J. Embed. Real Time Commun. Syst., 4 (1): 64-84 (2013)

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On the Influence of Pilot Symbol and Data Symbol Positioning on Turbo Synchronization., , , , and . VTC Spring, page 1723-1726. IEEE, (2007)Performance Evaluation of Opportunistic Beamforming with SINR Prediction for HSDPA., , and . VTC Spring, page 1652-1656. IEEE, (2007)Application-aware spinlock control using a hardware scheduler in MPSoC platforms., , , , , , and . ISSoC, page 1-6. IEEE, (2012)Multi-Scale Code Generation for Simulation-Driven Rapid ADAS Prototyping: the SMELT Approach., , , and . ICVES, page 1-8. IEEE, (2018)Using PEGs for Automatic Extraction of Memory Access Descriptions to Support Data-Parallel Pattern Recognition., , , and . PARMA-DITAM@HiPEAC, page 13-18. ACM, (2017)Modeling Exclusive Memory Access for a Time-Decoupled Parallel SystemC Simulator., , and . SCOPES, page 129-132. ACM, (2015)A Framework for Knowledge Integrated Evolutionary Algorithms., , , and . EvoApplications (1), volume 10199 of Lecture Notes in Computer Science, page 653-669. (2017)An FPGA-accelerated testbed for hardware component development in MIMO wireless communication systems., , , , , , and . ICSAMOS, page 278-285. IEEE, (2012)Pre-architectural performance estimation for ASIP design based on abstract processor models., , , , and . ICSAMOS, page 133-140. IEEE, (2014)Automatic recognition of computational kernels for platform-dependent code optimizations., , , and . SAMOS, page 11-20. IEEE, (2016)