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Efficient structural adder pipelining in transposed form FIR filters.

, , , and . DSP, page 311-314. IEEE, (2015)

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On the Design of a Reconfigurable Multiplier for Integer and Galois Field Multiplication., , , , and . ReCoSoC, page 185-191. Univ. Montpellier II, (2007)An Integrated Model Bridging the Gap between Technology and Economy., , and . VLSI-SOC, page 442-. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)A hierarchical generic approach for on-chip communication, testing and debugging of SoCs., , , , and . VLSI-SOC, page 44-49. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Dynamically Reconfigurable Systems for Wireless Sensor Networks., , and . Dynamically Reconfigurable Systems, Springer, (2010)Optimization of Constant Matrix Multiplication with Low Power and High Throughput., , and . IEEE Trans. Computers, 66 (12): 2072-2080 (2017)ScaLP: A Light-Weighted (MI)LP-Library., , , and . MBMV, Universität Tübingen, (2018)A Framework for Teaching (Re)Configurable Architectures in Student Projects., , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 444-451. Springer, (2002)Handling FPGA Faults and Configuration Sequencing Using a Hardware Extension., , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 586-595. Springer, (2002)An area-efficient FPGA realisation of a codebook-based image compression method., , , , and . FPT, page 349-352. IEEE, (2008)The XPP Architecture and Its Co-simulation Within the Simulink Environment., , , , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 761-770. Springer, (2004)